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vHDL Obfuscator GUI

Posted on by Robin Ding Leave a comment Scientific/Engineering
5.0

VHDL and Verilog HDL are standards languages for hardware description. Sometimes is necessary to share the source HDL file but maintaining a little level of control and protection of the intellectual property. This tool generate obfuscated code that is almost unreadable to humans, but is still readable to compilers and simulators.

This tool use GHDL (https://sourceforge.net/projects/ghdl-updates/), HDLObf (https://sourceforge.net/projects/hdlobf/), Icarus Verilog (https://sourceforge.net/projects/iverilog/) and was created in Lazarus (http://www.lazarus-ide.org/)

The SourceForge Speed Test measures Latency/Ping, Jitter, Download Speed, Upload Speed, Buffer Bloat, and Packet Loss. Upon completion, you can view detailed reports about your connection. This HTML5 speed test does not require Flash or Java, and works on all devices including tablets and smartphones. Host on your own infrastructure or use ours. For licensing, inquire today.

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Website http://ue.accesus.com/vhdl-obfuscator
Tags
License Creative Commons Attribution License
Features
  • VHDL, Verilog and System Verilog support
  • Syntax Highlighting
  • Synchronous edit
  • Save and restore of user reserved words
  • Obfuscation and reformatting of source code
  • Syntax Check